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Senior Verification Engineer – Wireless IoT

Ceva, Inc. · Belgrade

Nouveau
Senior 🇬🇧 English
SystemVerilog UVM SystemVerilog Assertions Python Formal verification Bluetooth BLE IEEE 802.15.4 SoC verification

Description du poste

About the role

Ceva is seeking an experienced Senior Verification Engineer to join its Wireless Internet of Things (WIoT) verification team. The role focuses on verifying complex Bluetooth, Bluetooth Low Energy (BLE) and IEEE 802.15.4 features at both IP and subsystem levels, emphasizing protocol behavior, integration and end‑to‑end validation.

Key responsibilities

  • Develop and maintain SystemVerilog/UVM verification environments from scratch, including constrained‑random tests, reusable components, assertions and functional coverage.
  • Integrate multiple verification environments and IP blocks into subsystem and system‑level test benches for Bluetooth, BLE and IEEE 802.15.4 features.
  • Define verification plans, create test scenarios, and verify protocol behavior, corner cases and error conditions.
  • Debug complex RTL and testbench issues, drive verification activities from planning through coverage closure.
  • Collaborate autonomously with RTL designers, architects and cross‑functional teams, and support integration of Bluetooth verification into larger connectivity environments.

Required profile

  • 7+ years of ASIC/SoC verification experience with strong ownership and autonomy.
  • Proven ability to build UVM environments from the ground up and integrate them at subsystem or SoC level.
  • Excellent debugging, problem‑solving and communication skills across multi‑disciplinary teams.

Required skills

  • SystemVerilog, UVM and SystemVerilog Assertions (SVA).
  • Python or other scripting languages for automation.
  • Formal verification techniques.
  • Deep knowledge of Bluetooth, Bluetooth Low Energy (BLE) and IEEE 802.15.4 standards.
  • Experience with ASIC/SoC verification, RTL design understanding and integration of verification IP.

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Ceva, Inc.

Belgrade