Senior Digital Designer

About the role

We are seeking a Senior Digital Designer to lead functional specification development and micro‑architecture implementation for high‑performance digital blocks in cutting‑edge semiconductor products. The role combines RTL design, debugging, and collaboration with verification and physical design teams.

Key responsibilities

• Lead functional specification development for advanced digital systems.
• Design and implement micro‑architecture (uArch) for high‑performance blocks.
• Perform RTL debugging to ensure design correctness and efficiency.
• Run and analyze lint checks and clock‑domain‑crossing (CDC) checks.
• Collaborate with verification, physical design, and architecture teams.
• Contribute to front‑end synthesis and optimization (bonus).
• Apply power‑optimization techniques for energy‑efficient designs.

Required profile

• 7+ years of hands‑on digital design experience.
• Bachelor’s degree in EE, ECE, CE, CS or related field (MS/PhD highly desired).
• Strong communication and collaboration skills.

Required skills

• Proficiency in Verilog and/or VHDL.
• Familiarity with SystemVerilog.
• Experience with Cadence Genus, Synopsys Design Compiler or Fusion Compiler.
• Expertise in RTL design, micro‑architecture development, and functional specifications.
• Deep knowledge of linting tools, CDC methodologies, and debugging flows.

What we offer

• Work on innovative semiconductor products with real‑world impact.
• Collaborative, forward‑thinking engineering team.
• Flexible work environment and competitive compensation.
• Opportunities for technical leadership and career growth.