Staff Silicon Design Engineer

About the role

AMD is seeking a Staff Silicon Design Engineer to lead verification of complex SoC subsystems. You will own verification strategy, test planning, execution, and sign‑off for features such as dataflow, RAS, memory/cache, coherency, DMA, interrupts, and high‑speed interfaces.

Key responsibilities

• Define verification strategy, coverage goals, corner cases and sign‑off criteria for assigned subsystems.
• Develop UVM/SystemVerilog testbenches, sequences, scoreboards, coverage models, checkers and assertions.
• Drive constrained‑random and directed testing, analyze coverage gaps and close functional, code and assertion metrics.
• Integrate multiple IP blocks and verify subsystem‑level interactions (coherency, ordering, QoS, power/clock/reset, security).
• Debug complex RTL and testbench issues using waveforms, logs and assertions.
• Collaborate with RTL, architecture, firmware, emulation and performance teams to refine requirements and triage bugs.
• Maintain CI/regression infrastructure and optimize simulation performance.
• Contribute to methodology improvements and reusable verification components.

Required profile

• Strong background in SoC or subsystem verification with hands‑on UVM/SystemVerilog experience.
• Deep understanding of complex SoC architectures, memory/cache hierarchies, coherency protocols and high‑speed interfaces such as PCIe and DDR.
• Proven ability to define verification strategies, develop reusable testbenches and achieve coverage‑driven sign‑off.
• Experienced in debugging RTL and system‑level issues using waveforms, logs and assertions.
• Self‑driven, detail‑oriented and comfortable working in cross‑functional teams.

Required skills

• UVM
• SystemVerilog
• SoC verification
• PCIe
• DDR
• Memory/cache hierarchy knowledge
• Coherency protocol expertise
• RTL debugging
• Waveform analysis
• Assertions (SVA)
• CI/regression infrastructure

What we offer

• Competitive compensation and comprehensive AMD benefits package.
• Opportunity to work on cutting‑edge silicon that powers AI, healthcare, scientific discovery and everyday technology.
• Collaborative environment with cross‑functional teams across hardware, firmware and architecture.